{"id":783,"date":"2010-04-03T21:17:09","date_gmt":"2010-04-03T18:17:09","guid":{"rendered":"http:\/\/neosmart.net\/blog\/?p=783"},"modified":"2013-08-26T18:19:06","modified_gmt":"2013-08-26T23:19:06","slug":"the-arm-the-ppc-the-x86-and-the-ipad","status":"publish","type":"post","link":"https:\/\/neosmart.net\/blog\/the-arm-the-ppc-the-x86-and-the-ipad\/","title":{"rendered":"The ARM, the PPC, the x86, and the iPad&#8230;"},"content":{"rendered":"<p>Hot on the heels of the iPad release comes news that Apple has just (very likely) purchased another processor design firm (via <a href=\"http:\/\/www.edn.com\/electronics-blogs\/brians-brain\/4305113\/Intrinsity-Gets-Sold-Did-Apple-Acquire-The-iPad-s-ARM-Design-Gold-\" rel=\"follow\">EDN<\/a>).&#160; Intrinsity, the chip design company in question, is a designer of RISC-based CPUs and is rumored to have had something to do with the design of Apple\u2019s new A4 processor. The A4 is Apple\u2019s key ingredient for a smooth user experience in the much-hyped iPad.<\/p>\n<p>Those keeping track of Apple\u2019s purchases will remember that, almost exactly 2 years ago to the day, Apple bought California-based CPU designer <a href=\"http:\/\/www.forbes.com\/2008\/04\/23\/apple-buys-pasemi-tech-ebiz-cz_eb_0422apple.html\" rel=\"follow\">PA Semiconductors<\/a>. However, PA Semi specializes in PowerPC-based designs \u2013 a platform <a href=\"http:\/\/en.wikipedia.org\/wiki\/Apple%E2%80%93Intel_transition\" rel=\"follow\">that Apple abandoned<\/a> almost 5 years ago now. But Apple\u2019s most recent acquisition is directly applicable to its current needs in the hardware market, and in particular, its forays into the ARM market. In <a href=\"http:\/\/www.apple.com\/ipad\/\" rel=\"follow\">the official iPad video<\/a>, Apple engineers and executives discuss their <em>need<\/em> for a custom CPU in order to let them dictate where the ooomph and power will go, and to what purposes the transistors will be biased.<\/p>\n<p>With all these buyouts and different chipsets in question, it\u2019s easy to get confused. <strong>So what <em>is<\/em> the difference between the ARM, the PPC, and the x86, and where does it matter?<\/strong><\/p>\n<p> <!--more-->  <\/p>\n<p>The world of CPUs is a dark, deadly, and dangerous place. After all, the CPU is said to be the literal \u201cheart\u201d of the PC \u2013 and as such, it\u2019s the single most-heavily engineered component. Billions of dollars and manhours have gone into the design of these various chipsets and they\u2019ve all been researched, optimized, fabricated, and sold in order to make your computer\u2026 better.<\/p>\n<p>The biggest difference between these platforms is the design dogma they follow. The x86 is a CISC architecture: <strong>Complex Instruction Set Computer<\/strong>. The other two (PPC and ARM) are RISC-based designs: <strong>Reduced Instruction Set Computers<\/strong>. What does that mean? Well, to the end user, mostly nothing. But to the CPU designers and developers, it makes a world of a difference. <\/p>\n<p>CISC architectures can have up to thousands of individual commands supported by the processor that can be used in machine code. Each of these assembly commands can range from a single operation to several hundred or more in length. On the other hand, RISC-based CPUs understand only a handful of different instructions, the minimum necessary to get the job done.<\/p>\n<p>However, this in no way means that CISC is more powerful or that RISC is limited. The difference in the amount of supported instructions is easily explained away by two factors: <em>supported modes<\/em>, and <em>wrapper operations<\/em>. All the data dealt with in any computer program is stored in the memory. But in order for the CPU to actually use any of it, it needs to place variables in super-fast (but small and limited) memory locations built into the CPU itself, called registers.<\/p>\n<p>Imagine trying to run the following line of code:<\/p>\n<p>z = x + y<\/p>\n<p>Each of the three variables in the above example is located in the memory. But in order to carry out the operation, x and y will need to be copied from the memory to the CPU, the addition instruction carried out, and the result then copied from the CPU to the location of z in the memory. <\/p>\n<p>A CISC-based CPU like the x86 would have a single instruction that \u2013 when given the address of X, Y, and Z in the memory \u2013 would do just that. But in a RISC-based CPU, the assembly code would have to explicitly spell out the individual steps: first copy x to a register, then copy y to a register, then add them together, and finally copy the result back into the memory.<\/p>\n<p>At first blush, it would seem that CISC is a much better option. After all, one instruction and the entire line of code is done. But it\u2019s not about operations, it\u2019s about time. Sure, a RISC-based program will need to carry out four distinct operations in order to do the same, but that doesn\u2019t mean it\u2019ll take any longer. In fact, RISC CPUs are consistently <em>faster<\/em> than their CISC counterparts.<\/p>\n<p>If CPUs were day laborers, it would make sense that CISC is more efficient. After all, a single instruction gets the job done. But, thankfully, CPUs aren&#8217;t underpaid interns, they\u2019re over-engineered miracles. The simpler design of the RISC CPU allows it to more efficiently optimize and carry out long sequences of code. The way things are broken down into short, simple, and clear instructions lets it carry out multiple operations at the same time (pipelining) and with less effort.<\/p>\n<p><strong>In fact, it\u2019s now a universally accepted truth that RISC is better than CISC!<\/strong> Actually, because of how much more efficient RISC machines are than their CISC counterparts, most CISC CPUs convert their CISC instructions into RISC instructions internally, <em>then<\/em> run them! <\/p>\n<p>So why are we still using x86? That\u2019s mainly because of business matters. Intel had x86, Intel had money, and CISC won out. Today, with the optimizations and internal RISC conversions that take place, CISC vs RISC isn\u2019t really about the performance any more. It\u2019s about the business, the politics\u2026 <strong>and the power consumption<\/strong>.<\/p>\n<p>The complexity of the CISC datapath and pipeline mean that it takes more power to get things done. Intel has worked some incredible miracles and accomplished some amazing things to get the power consumption down, ranging from dynamic scaling of the CPU clock to shutting-down parts of the CPU core when they\u2019re not in use. But x86 remains a power hog. Intel\u2019s Atom platform was an attempt at re-engineering the x86 to make it fit for mobile devices, but at the cost of performance.<\/p>\n<p>There\u2019s no reason that RISC can\u2019t be used for the desktop. ARM or no ARM, there\u2019s a plethora of RISC-based CPUs out there that can be easily adapted for desktop use. But the problem isn\u2019t with the hardware: it\u2019s with the software. Programs written for x86 aren\u2019t compatible with anything else, even other CISC CPUs. That has prevented just about the entire world from trying any other platforms, mainly because Windows only supports x86 on the desktop. The last copy of Windows to support different CPU architectures was Windows NT, which shipped with versions for Intel\u2019s x86, MIPS, Alpha, and PowerPC.<\/p>\n<p>For anyone not on the Windows platform though, there\u2019s nothing <em>really <\/em>binding them to the x86 platform. Apple chose x86 because, with PowerPC out of the running, x86 was the only viable option back in 2005. Keep in mind, just because ARM <em>can <\/em>run on the desktop, that doesn\u2019t mean that ARM <em>will<\/em> run on the desktop: optimizations in the CPU world are always a compromise between performance and power consumption. And the current generation of ARM and other RISC-based CPUs is meant for portable equipment. <\/p>\n<p>It would take some work to create a high-performance ARM CPU meant for the desktop, but that doesn\u2019t mean it won\u2019t happen. With Apple\u2019s just-declared purchase of Intrinsity, it\u2019s clear that it\u2019s a possibility. With the tight grip Apple has over its platform and the strong hardware-software bond, it wouldn\u2019t be too difficult to make the switch to yet another platform \u2013 after all, they did it 5 years ago and things worked out. But will they? Most likely not, it\u2019s not exactly in their customers best interest and x86 really is a decent platform. But for the myriad of mobile devices that Apple is getting itself into, x86 isn\u2019t the key. So look forward to more ARM goodiness for your iPad and iPhone in the years to come, but your MacBook is safe in Intel\u2019s loving hands.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Hot on the heels of the iPad release comes news that Apple has just (very likely) purchased another processor design firm (via EDN).&#160; Intrinsity, the chip design company in question, is a designer of RISC-based CPUs and is rumored to &hellip; <a href=\"https:\/\/neosmart.net\/blog\/the-arm-the-ppc-the-x86-and-the-ipad\/\">Continue reading <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":505,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"jetpack_post_was_ever_published":false,"_jetpack_newsletter_access":"","_jetpack_dont_email_post_to_subs":false,"_jetpack_newsletter_tier_id":0,"_jetpack_memberships_contains_paywalled_content":false,"_jetpack_memberships_contains_paid_content":false,"footnotes":""},"categories":[1],"tags":[107,639,719,722,87,19,85,718,349,720,350,721],"class_list":["post-783","post","type-post","status-publish","format-standard","hentry","category-software","tag-apple","tag-architecture","tag-arm","tag-chipset","tag-cpu","tag-hardware","tag-intel","tag-ipad","tag-ipod","tag-mips","tag-os-x","tag-x86"],"aioseo_notices":[],"jetpack_featured_media_url":"","jetpack_shortlink":"https:\/\/wp.me\/p4xDa-cD","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/neosmart.net\/blog\/wp-json\/wp\/v2\/posts\/783","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/neosmart.net\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/neosmart.net\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/neosmart.net\/blog\/wp-json\/wp\/v2\/users\/505"}],"replies":[{"embeddable":true,"href":"https:\/\/neosmart.net\/blog\/wp-json\/wp\/v2\/comments?post=783"}],"version-history":[{"count":1,"href":"https:\/\/neosmart.net\/blog\/wp-json\/wp\/v2\/posts\/783\/revisions"}],"predecessor-version":[{"id":2604,"href":"https:\/\/neosmart.net\/blog\/wp-json\/wp\/v2\/posts\/783\/revisions\/2604"}],"wp:attachment":[{"href":"https:\/\/neosmart.net\/blog\/wp-json\/wp\/v2\/media?parent=783"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/neosmart.net\/blog\/wp-json\/wp\/v2\/categories?post=783"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/neosmart.net\/blog\/wp-json\/wp\/v2\/tags?post=783"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}